1. Field of Invention
Various embodiments of the present invention generally relate to a semiconductor memory device having a bank, and more particularly, to refreshing the bank of the semiconductor memory device and method of performing the same.
2. Description of Related Art
In general, in a semiconductor memory device, data signals are read as ‘1’ or ‘0’ according to amounts of charges accumulated in a plurality of memory cells in which the data signals are recorded. In this regard, since the charges accumulated in the memory cells are discharged as time goes by, it is difficult to determine a ‘1’ or ‘0’. Thus, an auto refresh operation for amplifying the data signals recorded in the memory cells and re-recording the data signals in the memory cells is performed.
Auto refresh is divided into per bank refresh in which refresh is performed for respective banks of a semiconductor memory device and all bank refresh in which refresh is performed for all banks of the semiconductor memory device.
FIG. 1 is a block diagram a conventional semiconductor memory device in which auto refresh is performed.
Referring to FIG. 1, a semiconductor memory device includes a per bank refresh block 10 which receives a per bank refresh command PBR_CMD and generates per bank select signals PER_BS<1:4> enabled, an all bank refresh block 20 which receives an all bank refresh command ABR_CMD and generates an all bank select signal ALL_BS enabled, and a bank block 30 in which first to fourth banks 31 to 34, respectively, are respectively refreshed in the case where the per bank select signals PER_BS<1:4> are enabled and all of the first to fourth banks 31 to 34, respectively, are refreshed in the case where the all bank select signal ALL_BS is enabled.
Operations of the semiconductor memory device configured as mentioned above will be described with reference to FIG. 1, assuming that, after the first and second banks 31 and 32, respectively, are refreshed by receiving the per bank refresh command PBR_CMD, the all bank refresh command ABR_CMD is inputted.
First, the per bank refresh block 10 receives the per bank refresh command PBR_CMD, and enables the first and second per bank select signals PER_BS<1:2> and disables the third and fourth per bank select signals PER_BS<3:4>. The first and second banks 31 and 32, respectively, receive the enabled first and second per bank select signals PER_BS<1:2> and are refreshed. The third and fourth banks 33 and 34, respectively, receive the disabled third and fourth per bank select signals PER_BS<3:4> and are not refreshed.
Then, the all bank refresh block 20 receives the all bank refresh command ABR_CMD and enables the all bank select signal ALL_BS. The first to fourth banks 31 to 34 receive the enabled all bank select signal ALL_BS and are all refreshed.
In the semiconductor memory device configured in this way, in the case where the all bank refresh command ABR_CMD is inputted after the per bank refresh command PBR_CMD is inputted and the first and second banks 31 and 32, respectively, are refreshed, all of the first to fourth banks 31 to 34, respectively, are refreshed. Thus, since the first and second banks 31 and 32, respectively, are refreshed again, unnecessary current consumption is caused.